• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A power converter system includes: a circuit breaker having one terminal connected to a power system and another terminal connected to a load; a transformer for interconnection; a power converter; and a controller for controlling the power converter, wherein, during a return to grid connected operation, the power converter is controlled such that the phase of an output voltage of the power converter matches the phase of the system voltage, and the circuit breaker is closed, so as to prevent an overcurrent during a changeover from the self commutated operation to the grid connected operation of the power converter.
    公开号:US20010005321A1
    申请号:US09/748,268
    申请日:2000-12-27
    公开日:2001-06-28
    发明作者:Masaya Ichinose；Motoo Futami；Shigeta Ueda；Kazuo Suzuki；Akira Maekawa；Yasuhiro Kiyofuji
    申请人:Hitachi Engineering and Services Co Ltd；Hitachi Ltd；
    IPC主号:H02J3-32
    专利说明:
    [0001] A power converter which absorbs or releases electric power in interconnected relation to a power system is described in JP-A-8-66048. In a controller for the converter described in JP-A-8-66048, self commutated operation is performed with respect to a load by switching the control of the converter at the time of the self commutated operation of the converter from current control using a first phase-locked loop (PLL) to voltage control using a second PLL. In a converter described in Japanese Patent Application Laid-open Hei 8-9648 (JP-A-8-9648), an arrangement is provided such that when returning from self commutated operation to grid connected operation, voltage phases and amplitudes of a system voltage and a converter output are determined, and the moment when they coincide with each other, a coincidence signal is imparted to close a circuit breaker, whereupon the converter is temporarily stopped and the operation is resumed, thereby switching over control to grid connected operation. [0001]
    [0002] With the conventional technique described in the aforementioned Japanese Patent Application Laid-open Hei 8-66048 (JP-A-8-66048), at the time of the switching between the self commutated operation and the grid connected operation, cases occur in which controlled variables do not utterly converge, and the controlled variables fluctuate in steps. In addition, there are cases where a converter system stops due to an overcurrent at the time of returning from the self commutated operation to the grid connected operation. For this reason, the converter must be stopped to restore the control when a changeover to the grid connected operation is effected. In addition, with the conventional technique described in the aforementioned JP-A-8-66048, there are cases where an overcurrent occurs at the time of operation of the circuit breaker. [0002] SUMMARY OF THE INVENTION
    [0003] It has been found out from a study conducted by the present inventors that causes of the overcurrent and the sudden fluctuations of the controlled variables in the above-described conventional art lie in a phase shift occurring in the operation of a switching on/off means such as the circuit breaker upon ascertaining the moment of phase matching, the changeover between a phase detector for grid connected operation and a phase detector for self commutated operation, and the changeover between current control and voltage control. [0003]
    [0004] Accordingly, in the power converter system in accordance with the present invention, the converter is controlled such that the phase of an output voltage of the converter matches the phase of the system voltage, and the circuit breaker is closed so as to avoid the occurrence of an overcurrent. In addition, a common control system is adopted for grid connected operation and self commutated operation so as to avoid sudden fluctuations of the controlled variables. [0004]
    [0005] The power converter system in accordance with the present invention has a controller for adjusting an output phase of the converter so as to eliminate a phase difference between an ac voltage on a power system side of the switching on/off means and an ac voltage on a load side thereof. In the converter in accordance with the present invention has a controller for outputting a signal for opening or closing the switching on/off means in response to the phase difference between the aforementioned ac voltages. Preferably, the controller has a current control system for switching over a current command between grid connected operation and self commutated operation. [0005]
    [0006] Further the power converter system in accordance with the invention has the following features: [0006]
    [0007] (1) A common current control system is used for grid connected operation and self commutated operation. [0007]
    [0008] (2) A feedforward component of the output voltage of the converter is set to a fixed value during self commutated operation. [0008]
    [0009] (3) One (d-axis or q-axis) command value for current control is used as an output of voltage control, the other input deviation for current control is set to zero, and a phase detection signal is used in coordinate transformation in current detection. [0009]
    [0010] (4) The two-phase/three-phase coordinate transformation is self-oscillated. [0010]
    [0011] (5) Integral quantities of a power regulator and an automatic voltage regulator are made to conform to the integral quantity of the regulator being used for control. [0011]
    [0012] (6) The amount of correction of a phase difference Δθ during phase adjustment is provided with a limit, and the phase is adjusted with an amount of phase correction within an amount corresponding to the portion of frequency variation allowed for the system. [0012]
    [0013] (7) The system-side voltage of the circuit breaker is used as a voltage command value of the voltage regulator, a limiter within the allowable range of the voltage variation which is determined by the system is provided for that value, and an output of the limiter is used as the command value. [0013]
    [0014] (8) The feedforward detection value of the voltage of a converter controller is not fixed during self commutated operation. [0014] BRIEF DESCRIPTION OF THE DRAWINGS
    [0015] FIG. 1 is an explanatory diagram of a converter system in accordance with a first embodiment; [0015]
    [0016] FIG. 2 is an explanatory diagram of a self commutating/abnormality determining unit in accordance with the first embodiment; [0016]
    [0017] FIG. 3 is an explanatory diagram of a phase determining unit in accordance with the first embodiment; [0017]
    [0018] FIG. 4 is a an explanatory diagram of a phase detector in accordance with the first embodiment; [0018]
    [0019] FIG. 5 is an explanatory diagram of a converter controller in accordance with the first embodiment; [0019]
    [0020] FIG. 6 is an explanatory diagram of a detector of the converter controller in accordance with the first embodiment; [0020]
    [0021] FIG. 7 is an explanatory diagram of a controller of the converter controller in accordance with the first embodiment; [0021]
    [0022] FIG. 8 is an explanatory diagram of the detector of a converter controller in accordance with a second embodiment; [0022]
    [0023] FIG. 9 is an explanatory diagram of a controller of the converter controller in accordance with the second embodiment; [0023]
    [0024] FIG. 10 is an explanatory diagram of of a detector in accordance with a third embodiment; [0024]
    [0025] FIG. 11 is an explanatory diagram of a controller in accordance with the third embodiment; [0025]
    [0026] FIG. 12 is an explanatory diagram of a detector in accordance with a fourth embodiment; [0026]
    [0027] FIG. 13 is an explanatory diagram of a controller in accordance with the fourth embodiment; [0027]
    [0028] FIG. 14 is an explanatory diagram of a detector in accordance with a fifth embodiment; [0028]
    [0029] FIG. 15 is an explanatory diagram of a controller in accordance with the fifth embodiment; [0029]
    [0030] FIG. 16 is an explanatory diagram of a detector in accordance with a sixth embodiment; [0030]
    [0031] FIG. 17 is an explanatory diagram of a controller in accordance with the sixth embodiment; [0031]
    [0032] FIG. 18 is an explanatory diagram of a seventh embodiment; [0032]
    [0033] FIG. 19 is an explanatory diagram of an eighth embodiment in which a photovoltaic power generator is provided; [0033]
    [0034] FIG. 20 is an explanatory diagram of a ninth embodiment in which a wind power generation system having an inverter and a converter is provided; and [0034]
    [0035] FIG. 21 is an explanatory diagram of a tenth embodiment in which a dc transmission system is provided. [0035] DESCRIPTION OF THE EMBODIMENTS First Embodiment
    [0036] Referring to FIG. 1, a description will be given of a first embodiment of the invention. In FIG. 1, one terminal of a circuit breaker [0036] 3 a is connected to a power system, while the other terminal thereof is connected to loads at houses of consumers, factories, a wind power generator system 4 a, and the like, as well as a power converter system. The power converter system is comprised of a transformer 6 a for interconnection, a power converter 30, a secondary battery 5 a, and a system controller 50 for controlling the power converter 30. The power converter 30 supplies electric power to the loads 20, and stores electric energy generated by the wind power generator system 4 a in the secondary battery 5 a.
    [0037] A voltage Vc at a tie point of the power converter [0037] 30 is detected by a voltage detector 1 b, and is inputted to a phase detector 41. Meanwhile, a current Ic at the tie point of the power converter 30 is detected by a current detector 2 a, and is inputted to a converter controller 40 and a self commutating/abnormality determining unit 42. An output current Iacr of the power converter 30 is detected by a current detector 2 b, and is inputted to the converter controller 40. Further, a voltage Vs on the system side of the circuit breaker 3 a is detected by a voltage detector 1 a, and is inputted to the phase detector 41, the converter controller 40, and the self commutating/abnormality determining unit 42.
    [0038] The converter controller [0038] 40 outputs a gate pulse Gp for controlling the converter on the basis of voltage phases θc and θc′ outputted from the phase detector 41, the tie-point voltage Vc, the tie-point current Ic, and the converter current Iacr of the converter. The voltage Vs of the system, the voltage Vc at the tie point of the power converter 30, and a self commutating allowance signal MD which is an output of the self commutating/abnormality determining unit 42 are inputted to the phase detector 41, and the phase detector 41 outputs a phase difference Δθ between the system voltage Vs and the tie-point voltage Vc to the phase determining unit 43. The phase determining unit 43 determines the phase difference Δθ, and outputs a system interconnection allowance signal Ra to the self commutating/abnormality determining unit 42.
    [0039] The self commutating/abnormality determining unit [0039] 42 detects the state of self commutated operation of the power converter system as well as events affecting the load such as an accident of the system on the basis of the system voltage Vs, the tie-point current Ic, and the interconnection allowance signal Ra inputted thereto. The self commutating/abnormality determining unit 42 outputs a signal So for opening or closing the circuit breaker to the circuit breaker 3 a and outputs the self commutating allowance signal MD to the phase detector 41 and the converter controller 40. The circuit breaker 3 a operates upon receiving the closing or opening signal So outputted from the self commutating/abnormality determining unit 42.
    [0040] FIG. 2 shows the details of the self commutating/abnormality determining unit [0040] 42. In FIG. 2, the system voltage Vs and the tie-point current Ic are respectively inputted to a self commutated-operation detector and a power failure/overvoltage detector. The island detector detects the state of island operation from the tie-point current Ic and the system voltage Vs, and upon detecting the state of self commutated operation the island detector sets the value of a signal Ta to a “1,” and outputs it to an OR circuit. Meanwhile, the power failure/overvoltage detector detects the degree of a drop or rise in voltage, and when an abnormality is detected, the power failure/overvoltage detector sets the value of a signal Oa to a “1,” and outputs it to the OR circuit. The interconnection allowance signal Ra (“0” when interconnection is allowed, and “1” when it is not allowed), which is the output of the phase determining unit, is also inputted to the OR circuit. Thus, when any one of the self commutated operation signal Ta, the power failure/overvoltage signal Oa, and the interconnection allowance signal Ra is a “1,” the OR circuit outputs the opening signal So to the circuit breaker 3 a to open the circuit breaker 3 a or continue the open state of the circuit breaker 3 a. In addition, at the same time as outputting the circuit-breaker opening signal So, the OR circuit outputs the self commutating allowance signal MD to the phase detector 41 and the converter controller 40.
    [0041] FIG. 3 shows the details of the phase determining unit. The phase difference signal Δθ outputted from the phase detector is inputted to a level determining unit, and when Δθ is a value in the neighborhood of zero which does not affect the converter and the load at the time of closing the circuit breaker, the system interconnection allowance signal Ra is set to a “0,” and is outputted to the self commutating/abnormality determining unit. Here, as for the level for determining the phase difference, if, for example, the phase difference between the system voltage Vs and the converter voltage Vc is A, and the reactance from the power system to the converter is X, power P which is determined from the following formula (1) is absorbed or released between the converter and the system when the circuit breaker is closed. Hence, such a phase difference A that this power Po becomes sufficiently small with respect to the converter capacity is selected to minimize the effect on the converter. [0041]
    [0042] In addition, the aforementioned determining level may be provided with hysteresis to prevent the interconnection allowance signal Ra of the output from repeating the values of “1” and “0” step by step in a case where the value of Δθ is close to the value of a phase difference A in the aforementioned determining level. [0042]
    [0043] FIG. 4 shows the details of the phase detector. As for the phase signal θc detected from the output voltage Vc of the converter by a phase calculator, the difference between the same and the phase signal θs detected from the system voltage Vs by a phase calculator is calculated by a subtractor [0043] 7 a, and the calculated phase difference Δθ is outputted to the phase determining unit. Further, the phase signal θc is outputted to the converter controller, and is inputted to a phase holding unit as well. The self commutating allowance signal MD is inputted to the phase holding unit, and when the self commutating allowance signal MD indicates the self commutated operation, the mode shifts to a self-oscillation mode at a system frequency at the phase persisting at that point of time, and the phase holding unit outputs a phase signal θch to an adder 8 a. Further, the phase difference Δθ is inputted to the limiter, which in turn limits a correction amount Δθ with a phase difference corresponding to a frequency variation allowed for the system, and outputs a limited value Δθ′ to the adder 8 a. The adder 8 a adds the phase signals θch and Δθ′, and outputs the added result θc′ to the converter controller.
    [0044] A description will be given of the phase calculator. The term sin(ω·t+φ) out of cos(ω·t+φ) and sin(ω·t+φ), which are the results obtained by subjecting the system voltage Vc to three-phase/two-phase transformation, is calculated in accordance with expressions of Fourier transformation shown in formulae (2) and (3) so as to obtain VaR and VaI. Similarly, cos(ω·t+φ) is calculated in accordance with expressions of Fourier transformation shown in formulae (4) and (5) so as to obtain VbR and VbI. It should be noted that cos(ω·t) and sin(ω·t) are internal oscillation signals, t is the time, and φ is the phase difference with an internal oscillator. [0044] VaR = ∫ O T  [ cos     { ω · t } × sin     { ω · t + φ } ]   t = 1 2  ∫ O T  [ sin  { 2  ω · t + φ } + sin  { φ }]   t = 1 2 ·1 2  ω  [- cos     { 2  ω · t + φ } + t · sin     { φ }] O T =1 4  ω  [- cos     { 2  ω · T + φ } + T · sin  { φ }] - 1 4  ω  [ - cos     { φ } ] = T 4  ω  sin     { φ } ( 2 ) VaI = ∫ O T  [ sin     { ω · t } × sin     { ω · t + φ } ]   t = 1 2  ∫ O T  [ cos  { 2  ω · t + φ } - cos  { φ }]   t = 1 2 ·1 2  ω  [ sin     { 2  ω · t + φ } - t · cos     { φ }] O T = - 1 4  ω  [ sin     { 2  ω · T + φ } - T · cos  { φ }] + 1 4  ω  [ sin     { φ } ] = T 4  ω  cos     { φ } ( 3 ) VbR = ∫ O T  [ cos     { ω · t } × cos     { ω · t + φ } ]   t = 1 2  ∫ O T  [ cos  { 2  ω · t + φ } + cos  { - φ }]   t = 1 2 ·1 2  ω  [ sin     { 2  ω · t + φ } + t · cos     { - φ }] O T =1 4  ω  [ sin     { 2  ω · T + φ } + T · cos  { - φ }] - 1 4  ω  [ sin     { φ } ] = T 4  ω  cos     { φ } ( 4 ) VbI = ∫ O T  [ sin     { ω · t } × cos     { ω · t + φ } ]   t = 1 2  ∫ O T  [ sin  { 2  ω · t + φ } + sin  { - φ }]   t = 1 2 ·1 2  ω  [- cos     { 2  ω · t + φ } + t · sin     { - φ }] O T =1 4  ω  [- cos     { 2  ω · T + φ } + T · sin  { φ }] - 1 4  ω  [ - cos     { φ } ] =- T 4  ω  sin     { φ } ( 5 )
    [0045] Further, the obtained results are calculated in accordance with formulae (6) and (7) to obtain VR and VI. [0045]
    [0046] The calculated results VR and VI are transformed into ac signals Vcos and Vsin by using the phases cos(ω·t) and sin(ω·t) of the internal oscillators through coordinate transformation using formula (8). [0046] [ V     cos   V     sin ] = [+ VR · cos     ( ω · t ) + VI · sin     ( ω · t )- VR · sin     ( ω · t ) + VI · cos     ( ω · t ) ] ( 8 )
    [0047] Further, the phase angle θc is calculated in accordance with an arithmetic expression shown in formula (9). [0047]
    [0048] The phase signal θ s of the system voltage Vs is also determined in the same way as described above. [0048]
    [0049] FIG. 5 shows the configuration of the converter controller in accordance with this embodiment. In addition, FIG. 6 shows the details of the detector of the converter controller, and FIG. 7 shows the details of the controller of the converter controller. [0049]
    [0050] As shown in FIG. 6, the converter controller calculates active power P and reactive power Q being outputted to the system by a PQ calculator on the basis of the current detection value Ic and the voltage detection value Vc. The active power P and the reactive power Q thus obtained are respectively inputted to an active power regulator APR and a reactive power regulator AQR shown in FIG. 7, and the active power regulator APR and the reactive power regulator AQR calculate current command values Id[0050] 1* and Iq1* to allow the active power P and the reactive power Q to agree with command values P* and Q*, outputs them to switchers 10 a and 10 b, respectively. In addition, a voltage amplitude detection value Vs′ at the tie point of the converter is calculated by being inputted to an amplitude calculator shown in FIG. 6, and is outputted to a limiter. An amplitude value Vc′ of the output voltage Vc of the converter is also calculated by another amplitude calculator shown in FIG. 6, and is inputted to a subtractor 7 f as a feedback signal for an automatic voltage regulator AVR shown in FIG. 7. The voltage amplitude detection value Vs′ is inputted to the limiter shown in FIG. 6, and the limiter limits the voltage amplitude detection value Vs′ within a rated range of the system voltage and outputs it to a filter (not shown). A voltage amplitude V* without a high-frequency component removed by the filter is outputted to the subtractor 7 f so as to be used as a command value for the voltage regulator AVR. The subtractor 7 f outputs the result of calculation to the voltage regulator AVR, and an output Id2* of the voltage regulator AVR is inputted to a switcher 10 a. In addition, a q-axis component Iq of the current feedback is inputted to a switcher 10 b, and the switcher 10 b outputs either Iq or Iq1*.
    [0051] In addition, an integral value which is held in the active power regulator APR and an integral value which is held in the voltage regulator AVR use a common memory Za, and a setting is provided such that the integral value not being used for control agrees with the integral value being used for control. [0051]
    [0052] The phase signal θc is inputted to a coordinate transformer at the current Iacr and a coordinate transformer at the voltage Vc shown in FIG. 6. Each coordinate transformer transforms the three-phase ac signal into two-axis dc quantities from the phase signal θc, and transforms the current Iacr into Id and Iq and the voltage Vc into Vds and Vqs. The d-axis component Vds and the q-axis component Vqs of the voltage are respectively inputted to switchers [0052] 10 c and 10 d. Inputted to the switchers 10 c and 10 d are fixed values of the magnitude (1.0 pu) of the d-axis component and the magnitude (0.0 pu) of the q-axis component of the voltage detection value to be normally detected in the grid connected operation. If it is assumed that output signals of the respective switchers 10 c and 10 d are Vds′ and Vqs′, either Vds and Vqs or 1.0 pu and 0.0 pu are outputted as outputs.
    [0053] Outputs Id* and Iq* of the switcher [0053] 10 a and the switcher 10 b shown in FIG. 7 are respectively inputted to subtractors 7 b and 7 c, differences between the same and the feedback values Id and Iq of the current Iacr are calculated by the subtractors 7 b and 7 c, and the results are respectively outputted to a d-axis current regulator ACRd and a q-axis current regulator ACRq. In addition, the outputs Id* and Iq* of the switchers 10 a and 10 b are respectively outputted to noninterfering-component calculators wL. The outputs from the current regulator ACRd and the current regulator ACRq are respectively inputted to an adder-subtractor 9 a and an adder-subtractor 9 b. In addition, the noninterfering-component calculator wL calculates a noninterfering component from the q-axis current command value Iq*, and outputs it to the adder-subtractor 9 a. Similarly, the noninterfering-component calculator wL calculates a noninterfering component from the d-axis current command value Id*, and outputs it to the adder-subtractor 9 b.
    [0054] Further, the adder-subtractors [0054] 9 a and 9 b respectively add the d-axis component Vds′ and the q-axis component Vqs′ of the voltage detection value, and output the results of the arithmetic operation, Vd* and Vq*, to a two-phase/three-phase coordinate transformer. The two-phase/three-phase coordinate transformer transforms the signals Vd* and Vq* inputted by using the phase signal θc′ into a three-phase alternating current, and outputs it to a PWM computing unit. The PWM computing unit subjects the output from the two-phase/three-phase coordinate transformer to a PWM operation, and outputs a gate pulse Gp. Thus, since the two-phase/three-phase coordinate transformer effects transformation into a three-phase alternating current by using θc′ which is the sum of θch and Δθc′, i.e., Δθ whose value has been limited by the limiter, it is possible to adjust the output phase of the converter so as to eliminate Δθ.
    [0055] The self commutating allowance signal MD is inputted to the switchers [0055] 10 a and 10 b shown in FIG. 7 and the switchers 10 c and 10 d shown in FIG. 6. When the self commutating allowance signal MD is set to self commutated operation, the switcher 10 a selects Id2* as Id*, the switcher 10 b selects Iq as Iq*, the switcher 10 c uses the fixed value of 1.0 pu for Vds′ to fix a feedforward component of the voltage, and the switcher 10 d uses the fixed value of 0.0 pu for Vqs′.
    [0056] In this embodiment, since the voltage Vs on the system side of the circuit breaker [0056] 3 a is inputted to the phase detector 3 a, the output phase of the converter system can be adjusted in such a manner as to coincide with the phase of the system when the system voltage has returned during self commutated operation. Accordingly, in this embodiment, an overcurrent of the converter and an effect on the load are small when the system voltage has returned during self commutated operation. In addition, since the circuit breaker 3 a can be closed by directly operating the converter system when the phases have coincided with each other, equipment such as an interconnection protector is not required.
    [0057] In this embodiment, since part of the output of the phase detector is merely held during transfer to self commutated operation, and the coordinate transformation in current detection uses the signal from the phase detector as it is, the phase detection signal does not change abruptly during a shift to self commutated operation or a return to system interconnection, so that the converter can be controlled stably. [0057]
    [0058] In this embodiment, the current control system is used in common for the grid connected operation and the self commutated operation, so that it is possible to suppress sudden fluctuations in the controlled variables. In addition, since current control is used at the time of self commutated operation, in a case such as where the load has fluctuates and exceeds the capacity of the converter, it is possible to prevent an overcurrent by the operation of the limiter in current control. [0058]
    [0059] In this higher embodiment, higher harmonics can be reduced by fixing the feedforward components Vds and Vqs of the converter voltage during self commutated operation. [0059]
    [0060] In this embodiment, by using one (in this embodiment, d-axis) command value for current control as an output of voltage control, by setting the other input deviation for current control to zero, and by using a phase detection signal in coordinate transformation in current detection, a changeover to control of self commutated operation becomes possible while using the conventional current vector control. Further, by using the self-oscillated phase signal θc′ in the two-phase/three-phase coordinate transformation, the output voltage frequency during self commutated operation can be stabilized. [0060]
    [0061] In this embodiment, since integral quantities of the active power regulator APR and the voltage regulator AVR are made to conform to the integral quantity of the side in use, a changeover can be effected stably without sudden fluctuations in the controlled variables at the time of the changeover. [0061]
    [0062] In this embodiment, since the amount of correction of the phase difference Δθ is provided with a limit, and the phase is adjusted with an amount of phase correction falling within an amount corresponding to the portion of frequency variation allowed for the system, a return is possible from self commutated operation to grid connected operation while suppressing the frequency variation of the load to a minimum. [0062]
    [0063] In this embodiment, since the system-side voltage Vs of the circuit breaker is used as the voltage command value V* of the voltage regulator AVR, and a limiter within the allowable range of the voltage which is determined by the system is provided to use its output as a command value, when the system voltage has dropped during self commutated operation, a lower limit of the limit serves as a voltage command value, while when the system voltage has returned, the voltage of the self commutated system can be made to agree with the voltage of the system. [0063]
    [0064] Next, a description will be given of another embodiment of the invention. It should be noted that equivalent component elements throughout the drawings will be denoted by the same reference numerals, and a detailed description thereof will be omitted. [0064] Second Embodiment
    [0065] FIGS. 8 and 9 respectively illustrate a detector and a controller of the converter controller [0065] 40 in accordance with a second embodiment of the invention. In this embodiment, unlike the first embodiment, feedforward detection values Vds and Vqs of the voltage of the converter controller are also used during self commutated operation as during grid connected operation. In accordance with this embodiment, in addition to advantages similar to those of the first embodiment, since feedforward detection values of the voltage are constantly used, it is possible to follow at high speed a voltage fluctuation when an accident or the like has occurred in a transmission line during self commutated operation, and it is possible to prevent an overcurrent in the converter. Third Embodiment
    [0066] FIGS. 10 and 11 respectively illustrate a detector and a controller of the converter controller [0066] 40 in accordance with a third embodiment of the invention. In this embodiment, the configuration of the converter controller of the first embodiment during self commutated operation is different. A d-axis voltage regulator AVRd is used instead of the active power regulator APR, and a q-axis voltage regulator AVRq is used instead of the reactive power regulator AQR.
    [0067] In accordance with this embodiment, in addition to advantages similar to those of the first embodiment, since both the d-axis component and the q-axis component can be controlled by the current regulator, there is an advantage in suppressing an overcurrent. [0067] Fourth Embodiment
    [0068] FIGS. 12 and 13 respectively illustrate a detector and a fourth of the converter controller [0068] 40 in accordance with a third embodiment of the invention. In this embodiment, the configuration of the converter controller of the third embodiment during self commutated operation is different, and the fixed phase θc′ is used in the coordinate transformation of the current as well. In accordance with this embodiment, in addition to advantages similar to those of the first embodiment, since both the d-axis component and the q-axis component can be controlled by the current regulator, there is an advantage in suppressing an overcurrent. Fifth Embodiment
    [0069] FIGS. 14 and 15 respectively illustrate a detector and a controller of the converter controller [0069] 40 in accordance with a fifth embodiment of the invention. In this embodiment, the configuration of the converter controller of the third embodiment during self commutated operation is different, and the phase detection signal θc is used as the reference phase for two-phase/three-phase transformation. In accordance with this embodiment, in addition to advantages similar to those of the first embodiment, since both the d-axis component and the q-axis component can be controlled by the current regulator, there is an advantage in suppressing an overcurrent. Sixth Embodiment
    [0070] FIGS. 16 and 17 respectively illustrate a detector and a controller of the converter controller [0070] 40 in accordance with a sixth embodiment of the invention. In this embodiment, the configuration of the converter controller of the third embodiment during self commutated operation is changed, and the fixed signal θc′ is used as the reference phase signal for coordinate conversion for calculating a feedforward component of the voltage. In accordance with this embodiment, in addition to advantages similar to those of the first embodiment, since both the d-axis component and the q-axis component can be controlled by the current regulator, there is an advantage in suppressing an overcurrent. Seventh Embodiment
    [0071] In a seventh embodiment, a superconductive energy storage system is provided instead of the secondary battery [0071] 5 a of the first embodiment, as shown in FIG. 18. A superconductive coil 100 is installed in a dc portion of the power converter 30, and the superconductive energy storage system transmits and receives electric power to and from the system in response to commands from the system controller 50. In this embodiment, self commutated operation of the superconductive energy storage system is made possible. Eighth Embodiment
    [0072] In an eighth embodiment, a photovoltaic power generator is provided instead of the secondary battery [0072] 5 a of the first embodiment, as shown in FIG. 19. A solar cell panel 101 is installed in a dc portion of the converter 30 of the photovoltaic power generator, and releases electric power to the system in response to a command from the system controller 50. Ninth Embodiment
    [0073] In a ninth embodiment, a wind power generation system [0073] 4 b having an inverter and a converter is provided, as shown in FIG. 20. Dc portion of the inverter and the converter are used in common, and the secondary battery 5 a for storing electric energy is installed. Electric power is absorbed from or released to the system in response to a command from the system controller 50. A plurality of wind power generation systems 4 b may be provided. Tenth Embodiment
    [0074] In a tenth embodiment, a dc power transmission system [0074] 102 is provided, as shown in FIG. 21. The output of the dc power transmission system supplies electric power to the system from the converter.
    权利要求:
    Claims (8)
    [1" id="US-20010005321-A1-CLM-00001] 1. A power converter system comprising:
    switching on/off means having one terminal connected to a power system and another terminal connected to a load;
    a transformer for interconnection;
    a power converter; and
    a controller for controlling said power converter,
    wherein said power converter supplies electric power to a load and is connected to said load and to a power system through said switching on/off means, and said controller outputs a control signal for adjusting an output phase of said power converter on the basis of an ac voltage on a power system side of said switching on/off means and an ac voltage on a load side thereof so as to eliminate a phase difference between the power system-side ac voltage and the load-side ac voltage.
    [2" id="US-20010005321-A1-CLM-00002] 2. The power converter system according to
    claim 1 , wherein said controller outputs a signal for opening or closing said switching on/off means in accordance with the phase difference.
    [3" id="US-20010005321-A1-CLM-00003] 3. The power converter system according to
    claim 2 , wherein said controller has a current controlling system for switching over a current command between system interconnection operation and self commutated operation.
    [4" id="US-20010005321-A1-CLM-00004] 4. A power converter system comprising:
    switching on/off means having one terminal connected to a power system and another terminal connected to a load;
    a transformer for interconnection;
    a power converter; and
    a controller for controlling said power converter,
    wherein said power converter supplies electric power to a load and is connected to said load and to a power system through said switching on/off means, and said controller outputs a signal for opening or closing said switching on/off means on the basis of an ac voltage on a power system side of said switching on/off means and an ac voltage on a load side thereof in response to a phase difference between the power system-side ac voltage and the load-side ac voltage.
    [5" id="US-20010005321-A1-CLM-00005] 5. The power converter system according to
    claim 4 , wherein said controller outputs the signal for closing said switching on/off means when the phase difference is close to zero.
    [6" id="US-20010005321-A1-CLM-00006] 6. The power converter system according to
    claim 1 , wherein said power converter is further connected to a wind power generator system, and said power converter has energy storage means.
    [7" id="US-20010005321-A1-CLM-00007] 7. The power converter system according to
    claim 4 , wherein said power converter is further connected to a wind power generator system, and said power converter has energy storage means.
    [8" id="US-20010005321-A1-CLM-00008] 8. A method of controlling a power converter which supplies electric power to a load and is connected to the load and to a power system through switching on/off means, comprising the steps of:
    adjusting an output phase of said power converter on the basis of an ac voltage on a power system side of said switching on/off means and an ac voltage on a load side thereof so as to eliminate a phase difference between the power system-side ac voltage and the load-side ac voltage during self commutated operation of said converter; and
    closing and switching on/off means when said phase difference is close to zero.
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    同族专利:
    公开号 | 公开日
    JP3547355B2|2004-07-28|
    EP1113560A3|2003-05-14|
    KR20010062746A|2001-07-07|
    US6304468B2|2001-10-16|
    EP1113560A2|2001-07-04|
    JP2001190077A|2001-07-10|
    TW493311B|2002-07-01|
    CN1309451A|2001-08-22|
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    法律状态:
    2001-02-26| AS| Assignment|Owner name: HITACHI, LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ICHINOSE, MASAYA;FUTAMI, MOTOO;UEDA, SHIGETA;AND OTHERS;REEL/FRAME:011540/0539;SIGNING DATES FROM 20001205 TO 20001220 Owner name: HITACHI ENGINEERING & SERVICES CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ICHINOSE, MASAYA;FUTAMI, MOTOO;UEDA, SHIGETA;AND OTHERS;REEL/FRAME:011540/0539;SIGNING DATES FROM 20001205 TO 20001220 |
    2001-09-27| STCF| Information on status: patent grant|Free format text: PATENTED CASE |
    2005-04-08| FPAY| Fee payment|Year of fee payment: 4 |
    2009-03-26| FPAY| Fee payment|Year of fee payment: 8 |
    2013-03-06| FPAY| Fee payment|Year of fee payment: 12 |
    2019-12-19| AS| Assignment|Owner name: HITACHI INDUSTRIAL PRODUCTS, LTD., JAPAN Free format text: ABSORPTION-TYPE SPLIT;ASSIGNOR:HITACHI, LTD.;REEL/FRAME:051377/0894 Effective date: 20190401 |
    优先权:
    申请号 | 申请日 | 专利标题
    JP37267899A|JP3547355B2|1999-12-28|1999-12-28|Power conversion system|
    JP11-372678||1999-12-28||
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